1. Field
This application relates generally to semiconductor devices and methods of making the devices and, in particular, to wide-bandgap semiconductor devices such as SiC vertical channel junction field effect transistors with reduced gate-source leakage under reverse bias.
2. Background of the Technology
To date, vertical channel silicon carbide junction field effect transistors have been proposed as devices with vertical or near vertical sidewalls [1, 2]. In devices with vertical or near vertical sidewalls, however, it can be difficult to achieve uniform p+ sidewall doping using ion implantation. In particular, normal incident ion implantation can result in non-uniformly doped sidewalls having a low dopant concentration.
The use of angled ion implantation to dope the sidewalls has been disclosed [1, 3]. Even with this approach, however, it is difficult to achieve an idealized structure having uniform channel width (wch). In particular, the use of an angled implantation can still result in heavier doping near the trench bottom and non-uniform doping along the sidewall which reduces device performance. Furthermore, to insure similar doping on both sidewalls the wafer has to be rotated during implantation. For SiC, however, ion implantation requires multiple implants at different energies. Therefore, a process involving rotation of the wafer and angled implantation can add significantly to the complexity and cost of the manufacturing process.
Accordingly, there still exists a need for improved methods of making semiconductor devices such as vertical JFETs with more uniform and well-controlled channel width.